| Tue, 02 Nov 2021 16:44:41 +0000 |
Darron Broad |
userid is never set properly in hex file for unknown
default tip
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| Tue, 02 Nov 2021 12:40:33 +0000 |
Darron Broad |
use ASCII quotes
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| Tue, 02 Nov 2021 12:33:15 +0000 |
Darron Broad |
add settings from
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| Tue, 02 Nov 2021 11:25:03 +0000 |
Darron Broad |
add config info from data-sheet.
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| Fri, 29 Oct 2021 15:14:09 +0100 |
Darron Broad |
use virtual addresses in hex for no benefit
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| Wed, 27 Oct 2021 20:15:44 +0100 |
Darron Broad |
fix comments
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| Wed, 27 Oct 2021 20:14:58 +0100 |
Darron Broad |
less distracing LED in the corner of the room?
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| Tue, 26 Oct 2021 13:35:39 +0100 |
Darron Broad |
skip is n/a
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| Tue, 26 Oct 2021 12:37:32 +0100 |
Darron Broad |
add diagram from test example
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| Mon, 03 Aug 2020 05:08:22 +0100 |
Darron Broad |
test for q43
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| Wed, 09 Jan 2019 17:03:32 +0000 |
Darron Broad |
testing EEPROM and all went well
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| Wed, 09 Jan 2019 13:16:50 +0000 |
Darron Broad |
for testing, no need for 128KB all the time.
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| Wed, 09 Jan 2019 12:57:17 +0000 |
Darron Broad |
tested ok on Q series, need to test flash next
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| Tue, 08 Jan 2019 04:31:59 +0000 |
Darron Broad |
EEPROM test. which works on new algo
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| Fri, 04 Jan 2019 09:19:34 +0000 |
Darron Broad |
not supported in pickle as yet
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| Wed, 26 Dec 2018 19:38:39 +0000 |
Darron Broad |
remove invalid protection and fix assemble for missing EEPROM.
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| Tue, 28 Feb 2017 19:17:47 +0000 |
Darron Broad |
always 2
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| Tue, 28 Feb 2017 19:13:28 +0000 |
Darron Broad |
stop bit control added.
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| Tue, 28 Feb 2017 18:16:53 +0000 |
Darron Broad |
programming sucks
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| Tue, 28 Feb 2017 18:13:33 +0000 |
Darron Broad |
hint added here as well. ALL DONE NOW
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| Tue, 28 Feb 2017 18:07:08 +0000 |
Darron Broad |
add stop bit recv delay. this will only be required when
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| Tue, 28 Feb 2017 17:38:35 +0000 |
Darron Broad |
do stop bit after all
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| Tue, 28 Feb 2017 17:12:16 +0000 |
Darron Broad |
no more fiddling to do. leave it now
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| Tue, 28 Feb 2017 17:10:39 +0000 |
Darron Broad |
revert last "optimisation". it works when receiving 1 byte
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| Tue, 28 Feb 2017 17:01:26 +0000 |
Darron Broad |
return from receive earlier, ie, after last sample.
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| Tue, 28 Feb 2017 16:06:22 +0000 |
Darron Broad |
don't really need this demo any more.
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| Tue, 28 Feb 2017 16:01:09 +0000 |
Darron Broad |
test later i suppose
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| Tue, 28 Feb 2017 15:57:07 +0000 |
Darron Broad |
that maybe needed
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| Tue, 28 Feb 2017 15:48:05 +0000 |
Darron Broad |
update demo. test later.
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| Tue, 28 Feb 2017 01:36:06 +0000 |
Darron Broad |
no more testing needed. am now satisfied with dodgy
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| Tue, 28 Feb 2017 01:26:25 +0000 |
Darron Broad |
actually it can do 32MHz with PLL just not >20 with XTAL or maybe
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| Tue, 28 Feb 2017 01:24:19 +0000 |
Darron Broad |
even works nicely at 25 MHz which by my reckoning is
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| Tue, 28 Feb 2017 01:21:24 +0000 |
Darron Broad |
ok, revert back to +1 +6. this works well for all XTALS overall and
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| Tue, 28 Feb 2017 01:13:24 +0000 |
Darron Broad |
over a range of XTALS it suggest that calibration is not
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| Mon, 27 Feb 2017 21:24:28 +0000 |
Darron Broad |
read calibration done.
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| Mon, 27 Feb 2017 21:22:20 +0000 |
Darron Broad |
read calibrated from 9600 to 115200. it may work at 115200 but
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| Mon, 27 Feb 2017 20:26:45 +0000 |
Darron Broad |
calibrated.
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| Mon, 27 Feb 2017 20:25:27 +0000 |
Darron Broad |
ok, adding 1 centres the bits
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| Mon, 27 Feb 2017 20:20:38 +0000 |
Darron Broad |
get config right
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| Mon, 27 Feb 2017 20:18:10 +0000 |
Darron Broad |
rename this. will be updated with calibration later and after
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| Mon, 27 Feb 2017 20:17:07 +0000 |
Darron Broad |
hardware and software uart examples.
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| Mon, 27 Feb 2017 20:13:39 +0000 |
Darron Broad |
will port for 1708 with XTAL for calibration testing
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| Mon, 27 Feb 2017 00:55:27 +0000 |
Darron Broad |
this isn't enough time to bother with that. this will need
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| Mon, 27 Feb 2017 00:49:13 +0000 |
Darron Broad |
needs testing
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| Mon, 27 Feb 2017 00:40:51 +0000 |
Darron Broad |
echo works but really need to wait for stop bit...
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| Mon, 27 Feb 2017 00:38:50 +0000 |
Darron Broad |
receive works but it doesn't bother checking for stop bits. not
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| Mon, 27 Feb 2017 00:11:00 +0000 |
Darron Broad |
wait for input. the delay moves the sample point midway into
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| Sun, 26 Feb 2017 20:53:06 +0000 |
Darron Broad |
fake receive. next: real receive. not sure how to test to
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| Sun, 26 Feb 2017 20:19:03 +0000 |
Darron Broad |
this may do. need to re-use zero page vars later
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| Sun, 26 Feb 2017 19:26:40 +0000 |
Darron Broad |
ok then. really do receive then this can plug into cowboy and
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| Sun, 26 Feb 2017 19:06:32 +0000 |
Darron Broad |
got to stop wasting time doing this and get receive working.
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| Sun, 26 Feb 2017 18:55:45 +0000 |
Darron Broad |
it's already rounded up, what the fuck am i doing. no idea
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| Sun, 26 Feb 2017 18:48:28 +0000 |
Darron Broad |
get it right
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| Sun, 26 Feb 2017 18:47:22 +0000 |
Darron Broad |
this looks so terrible it cannot be the only way, but wth
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| Sun, 26 Feb 2017 18:22:57 +0000 |
Darron Broad |
fix bank. main issue seems be only a rounding one. gpasm
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| Sun, 26 Feb 2017 18:18:43 +0000 |
Darron Broad |
look at this error adjustment later. factors include FRC
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| Sun, 26 Feb 2017 18:12:49 +0000 |
Darron Broad |
i think the timer stalls for 2 bits when loaded, this shortens
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| Sun, 26 Feb 2017 18:08:19 +0000 |
Darron Broad |
stop bit duration is clearly too long but that's perfectly fine by me
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| Sun, 26 Feb 2017 18:04:58 +0000 |
Darron Broad |
ok, this is enough for now. internal oscillator is not exact so
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| Sun, 26 Feb 2017 16:15:40 +0000 |
Darron Broad |
deleted a very important line. lol
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